The present invention relates to a semiconductor device and a manufacturing method thereof. The present invention is preferably applicable to, for example, a semiconductor device including a semiconductor element formed at a semiconductor substrate therein, and a manufacturing method thereof.
A semiconductor device having a memory cell region including a memory cell such as a nonvolatile memory formed over a semiconductor substrate therein has been widely used. For example, a memory cell formed of a split gate type cell using a MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor) film may be formed as a nonvolatile memory. At this step, the memory cell is formed of two MISFETs (Metal Insulator Semiconductor Field Effect Transistors) of a control transistor having a control gate electrode and a memory transistor having a memory gate electrode. Further, the memory gate electrode is formed by leaving a conductive film in a sidewall spacer shape over the side surface of the control gate electrode via an insulation film.
Japanese Unexamined Patent Application Publication No. 2010-282987 (Patent Document 1) discloses a technology of a semiconductor device having a first memory cell and a second memory cell formed at the the main surface of the semiconductor substrate, in which each of the first and second memory cells has a control gate and a memory gate. Whereas, Japanese Unexamined Patent Application Publication No. 2008-294088 (Patent Document 2) discloses a technology of a semiconductor device having a nonvolatile memory cell including a first field effect transistor in a first region, and a second field effect transistor adjacent to the first field effect transistor in a second region of the main surface of the semiconductor substrate.
Japanese Unexamined Patent Application Publication No. 2007-5771 (Patent Document 3) discloses a technology of an integrated semiconductor nonvolatile storage device at least having a plurality of semiconductor nonvolatile storage elements each formed to at least have a semiconductor substrate, and an insulation gate type field effect transistor having a charge holding part over the semiconductor substrate. Furthermore, Japanese Unexamined Patent Application Publication No. 2011-210777 (Patent Document 4) discloses a technology of a semiconductor device having a semiconductor substrate, a first gate electrode formed at the top of the semiconductor substrate, and a second gate electrode formed at the top of the semiconductor substrate, and adjacent to the first gate electrode.